{"id":836410,"date":"2023-07-04T14:15:00","date_gmt":"2023-07-04T12:15:00","guid":{"rendered":"https:\/\/www.tomshardware.fr\/?p=836410"},"modified":"2023-07-05T00:23:43","modified_gmt":"2023-07-04T22:23:43","slug":"lia-et-la-securite-comme-fer-de-lance-pour-les-prochains-processeurs-dintel","status":"publish","type":"post","link":"https:\/\/www.tomshardware.fr\/lia-et-la-securite-comme-fer-de-lance-pour-les-prochains-processeurs-dintel\/","title":{"rendered":"L&#8217;IA et la s\u00e9curit\u00e9 comme fer de lance pour les prochains processeurs d&#8217;Intel"},"content":{"rendered":"\n<p>La mise \u00e0 jour du document <em>Architecture Instruction Set Extensions and Future Features<\/em> par Intel d\u00e9taille les jeux d\u2019instruction pris en charge par les prochaines g\u00e9n\u00e9rations de Core. Le document r\u00e9v\u00e8le que <a href=\"https:\/\/www.tomshardware.fr\/les-processeurs-meteor-et-arrow-lake-utiliseraient-le-socket-lga-1851\/\">les s\u00e9ries Arrow Lake et Lunar Lake<\/a> <strong>supporteront les instructions AVX-VNNI-INT16, SHA512, SM3 et SM4<\/strong>. Celles-ci acc\u00e9l\u00e8rent notamment les charges de travail relatives \u00e0 l\u2019intelligence artificielle et aux fonctions de hachage.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img decoding=\"async\" src=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/01\/intel-core-couv1.jpg\" alt=\"Intel Core\" class=\"wp-image-754714\" \/><figcaption class=\"wp-element-caption\">\u00a9 Intel<\/figcaption><\/figure><\/div>\n\n\n<p>Avant tout, rappelons que chez Intel, la prochaine cuv\u00e9e de processeurs sera celle des Core de 14e g\u00e9n\u00e9ration, alias Meteor Lake. Ce n\u2019est encore totalement certain, <a href=\"https:\/\/www.tomshardware.fr\/les-processeurs-meteor-lake-s-annules-pour-mieux-lancer-les-arrow-lake-s-debut-2024\/\">mais plusieurs \u00e9l\u00e9ments laissent \u00e0 penser que cette gamme sera limit\u00e9e aux ordinateurs portables<\/a>. Du c\u00f4t\u00e9 des plateformes desktop, il faudrait plut\u00f4t <a href=\"https:\/\/www.tomshardware.fr\/intel-va-rafraichir-ses-processeurs-raptor-lake-deux-vagues-de-core-prevus-dici-noel\/\">composer avec des Raptor Lake Refresh, d\u2019ailleurs r\u00e9cemment officialis\u00e9s par Intel<\/a>.<\/p>\n\n\n\n<p>Les processeurs Meteor Lake, dont certains sp\u00e9cimens ont \u00e9t\u00e9 pr\u00e9sent\u00e9s lors du Computex 2023, ont plusieurs particularit\u00e9s. L\u2019une d\u2019entre elles est leur conception \u00e0 base de tuiles&nbsp;; parmi ces tuiles, une tuile dot\u00e9e d\u2019un moteur IA.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\u00c0 lire &gt; <a href=\"https:\/\/www.tomshardware.fr\/msi-devoile-le-premier-ordinateur-portable-arme-dun-processeur-meteor-lake\/\">MSI d\u00e9voile le premier ordinateur portable arm\u00e9 d\u2019un processeur Meteor Lake<\/a><\/strong><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-a-quoi-servent-ces-instructions\">\u00c0 quoi servent ces instructions ?<\/h2>\n\n\n\n<p>Les puces Arrow Lake et Lunar Lake, qui correspondent respectivement aux 15e et 16e g\u00e9n\u00e9rations de Core, reprendront cette conception. En mati\u00e8re de jeux d\u2019instructions, le document d\u2019Intel liste plusieurs ajouts&nbsp;: AVX-VNNI-INT16 (op\u00e9rations sur les nombres entiers de 8 et 16 bits), SHA512, SM3 et SM4.<\/p>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-1 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img alt=\"Image 1 : L&#039;IA et la s\u00e9curit\u00e9 comme fer de lance pour les prochains processeurs d&#039;Intel\" decoding=\"async\" width=\"1984\" height=\"2048\" src=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-scaled.jpg\" alt=\"\" class=\"wp-image-836451\" srcset=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-scaled.jpg 1984w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-291x300.jpg 291w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-992x1024.jpg 992w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-768x793.jpg 768w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-1488x1536.jpg 1488w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel1-1320x1362.jpg 1320w\" sizes=\"(max-width: 1984px) 100vw, 1984px\" \/><figcaption class=\"wp-element-caption\">\u00a9 Intel<\/figcaption><\/figure><\/div><\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\"><div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img alt=\"Image 2 : L&#039;IA et la s\u00e9curit\u00e9 comme fer de lance pour les prochains processeurs d&#039;Intel\" decoding=\"async\" width=\"2000\" height=\"1286\" src=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21.jpg\" alt=\"\" class=\"wp-image-836452\" srcset=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21.jpg 2000w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21-300x193.jpg 300w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21-1024x658.jpg 1024w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21-768x494.jpg 768w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21-1536x988.jpg 1536w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/instructions-Intel-21-1320x849.jpg 1320w\" sizes=\"(max-width: 2000px) 100vw, 2000px\" \/><figcaption class=\"wp-element-caption\">\u00a9 Intel<\/figcaption><\/figure><\/div><\/div>\n<\/div>\n\n\n\n<p>Les instructions AVX-VNNI (<em>Vector Neural Network Instructions<\/em>) sont con\u00e7ues pour <strong>acc\u00e9l\u00e9rer les algorithmes d\u2019intelligence artificielle et d\u2019apprentissage automatique<\/strong>. Les SHA-512 (<em>Secure Hash Algorithm<\/em>), SM3 et SM4 sont des fonctions de hachage et des algorithmes de hachage cryptographique qui <strong>visent \u00e0 renforcer la s\u00e9curit\u00e9 et l\u2019int\u00e9grit\u00e9 des donn\u00e9es<\/strong>.<\/p>\n\n\n\n<p>Notez \u00e9galement le support des instructions LAM (<em>Linear Address Masking<\/em>), lesquelles permettent aux logiciels d&#8217;utiliser les bits d&#8217;adresse non traduits des adresses lin\u00e9aires de 64 bits pour les m\u00e9tadonn\u00e9es.<\/p>\n\n\n\n<p>Enfin, vous remarquerez l\u2019ajout de CPUID pour les processeurs Raptor Lake venant confirmer qu\u2019une mise \u00e0 jour est pr\u00e9vue.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img alt=\"Image 3 : L&#039;IA et la s\u00e9curit\u00e9 comme fer de lance pour les prochains processeurs d&#039;Intel\" decoding=\"async\" width=\"2000\" height=\"1239\" src=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1.jpg\" alt=\"\" class=\"wp-image-836449\" srcset=\"https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1.jpg 2000w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1-300x186.jpg 300w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1-1024x634.jpg 1024w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1-768x476.jpg 768w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1-1536x952.jpg 1536w, https:\/\/www.tomshardware.fr\/content\/uploads\/sites\/3\/2023\/07\/Raptor-Lake-Intel1-1320x818.jpg 1320w\" sizes=\"(max-width: 2000px) 100vw, 2000px\" \/><figcaption class=\"wp-element-caption\">\u00a9 Intel<\/figcaption><\/figure><\/div>\n\n\n<p class=\"has-small-font-size\"><em>Source : <a href=\"https:\/\/cdrdv2-public.intel.com\/782879\/architecture-instruction-set-extensions-programming-reference.pdf\" target=\"_blank\" rel=\"noreferrer noopener\">Intel<\/a><\/em><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Intel indique que ses processeurs Arrow Lake et Lunar Lake (Core de 15e et 16e g\u00e9n\u00e9rations) supporteront notamment les instructions AVX-VNNI-INT16, SHA512, SM3 et SM4. Par ailleurs, l'entreprise confirme une nouvelle fois l'arriv\u00e9e prochaine des\u2026<\/p>","protected":false},"author":87,"featured_media":754714,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[487,4071],"tags":[493],"hubs":[],"class_list":["post-836410","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-actualite","category-processeurs","tag-intel"],"acf":{"display_mode":"medium-img","post_show_excerpt":true,"post_show_in_home":false,"post_show_summary":false,"post_source":"","hide_sidebar":false,"hide_advertising":false},"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v21.5 (Yoast SEO v23.1) - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>L&#039;IA et la s\u00e9curit\u00e9 comme fer de lance pour les prochains processeurs d&#039;Intel<\/title>\n<meta name=\"description\" content=\"Intel indique que ses processeurs Arrow Lake et Lunar Lake (Core de 15e et 16e g\u00e9n\u00e9rations) supporteront notamment les instructions AVX-VNNI-INT16, SHA512, SM3 et SM4. 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Alors devant une carte Voodoo, j'aurais certainement la m\u00eame attitude qu'un singe devant une \u0153uvre d'art. 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